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Appendix A – Configuration Straps
Closed
1–2
Closed
CB13, CB14
(1)
Open
CB15
(1)
2–3
CB16
1–2
2 – 3 (1)
CB17
(1)
Open
CB18
Open
Closed
JP1
2–3
1–2
JP2
Open
Closed
AT91EB55 Evaluation Board User Guide
I 2 C EEPROM Enabling
E 2 PROM communication is enabled.
E 2 PROM communication is disabled. This authorizes users to connect the
corresponding PIO to their own resources via the I/O expansion connector.
JTAGSEL
The MCU standard ICE debug feature is enabled.
IEEE 1149.1 JTAG boundary scan feature is enabled.
R(eturn) TCK ICE Signal Synchronization
The TCK signal from the JTAG interface can be synchronized with MCKO
signal and returns to the JTAG interface. (RTCK)
The TCK and RTCK ICE signals are not synchronized with MCKO.
V DDCORE Voltage Measurement
The V DDCORE power supply is connected to the ADC Channel 2 (AD2) input
through a resistor bridge (divisor ratio 1/2).
The V DDCORE power supply is not connected to the ADC Channel 2 (AD2) input.
This authorizes users to connect the corresponding ADC Channel to their own
resources via the I/O expansion connector.
Flash Configuration
Should be open when an AT49BV162A is fitted on the board.
Should not be closed when an AT49BV162A is fitted on the board.
User or Standard Boot Selection
The first half of the Flash memory is accessible at its base address.
The second half of the Flash memory is accessible at its base address. This
authorizes users to download their own application software in this part and to
boot on it.
Push Button Enabling
SW1-4 inputs to the AT91 are valid.
SW1-4 inputs to the AT91 are not valid. This authorizes users to connect the
corresponding PIO to their own resources via the I/O expansion connector.
5-3
1709C–ATARM–28-Apr-05
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